Overview
The AD9571ACPZLVD-RL, produced by Analog Devices Inc., is a highly integrated Ethernet clock generator designed specifically for Ethernet line card applications. This component features a dedicated PLL core optimized for low jitter and low phase noise clock generation, which is crucial for maximizing network performance. The AD9571 is based on Analog Devices' proven portfolio of high-performance frequency synthesizers and includes a low noise phase frequency detector (PFD), a precision charge pump (CP), and a low phase noise voltage controlled oscillator (VCO). It operates from a single 3.3 V supply and is available in a space-saving 40-lead 6 mm × 6 mm lead frame chip scale package (LFCSP).
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Supply Voltage | 3.3 | V |
| Operating Temperature Range | −40°C to +85°C | °C |
| Package Type | 40-Lead LFCSP (6mm x 6mm w/ EP) | |
| Power Dissipation (LVDS Operation) | 0.48 | W |
| Power Dissipation (LVPECL Operation) | 0.69 | W |
| Reference Input Frequency | 25 MHz | Hz |
| Output Frequencies | 25 MHz (CMOS, 6 copies), 33.33 MHz (CMOS, 1 copy), 100/125 MHz (LVPECL/LVDS, 2 copies), 156.25 MHz (LVPECL/LVDS, 1 copy) | Hz |
| Jitter (rms) at 156.25 MHz | 0.17 ps (1.875 MHz to 20 MHz) | ps |
| Jitter (rms) at 125 MHz | 0.41 ps (12 kHz to 20 MHz) | ps |
Key Features
- Fully integrated VCO/PLL core with low noise phase frequency detector (PFD) and precision charge pump (CP).
- Choice of LVPECL or LVDS output format, with LVDS outputs meeting or exceeding ANSI/TIA/EIA-644 specifications.
- Integrated loop filter and regulators for supply noise immunity.
- Six copies of the 25 MHz reference clock output available.
- Configurable output rates via strapping pins.
- Space-saving 6 mm × 6 mm 40-lead LFCSP package.
Applications
- Ethernet line cards, switches, and routers.
- SCSI, SATA, and PCI-express applications.
- Other applications requiring low jitter and low phase noise clock generation.
Q & A
- What is the primary function of the AD9571?
The AD9571 is a multioutput clock generator optimized for Ethernet line card applications, providing low jitter and low phase noise clock generation.
- What are the available output formats for the AD9571?
The AD9571 offers LVPECL and LVDS output formats, along with CMOS outputs for certain frequencies.
- What is the power dissipation of the AD9571 in LVDS and LVPECL operations?
The power dissipation is 0.48 W for LVDS operation and 0.69 W for LVPECL operation.
- What is the operating temperature range of the AD9571?
The operating temperature range is −40°C to +85°C.
- How are the output frequencies configured on the AD9571?
The output frequencies are configured via strapping pins, allowing for different output rates such as 25 MHz, 33.33 MHz, 100/125 MHz, and 156.25 MHz.
- What type of package does the AD9571 come in?
The AD9571 is available in a 40-lead 6 mm × 6 mm lead frame chip scale package (LFCSP).
- Does the AD9571 require external loop filter components?
No, the AD9571 does not require external loop filter components as it has an integrated loop filter.
- What is the reference input frequency for the AD9571?
The reference input frequency is 25 MHz, which can be provided by an external crystal or reference clock.
- What are the typical applications of the AD9571?
The AD9571 is typically used in Ethernet line cards, switches, routers, SCSI, SATA, and PCI-express applications.
- How does the AD9571 ensure low jitter and phase noise performance?
The AD9571 ensures low jitter and phase noise performance through its integer-N PLL design, low noise PFD, precision CP, and low phase noise VCO.
