Overview
The AD9467BCPZ-250 is a high-performance, 16-bit, monolithic IF sampling analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is optimized for high performance over wide bandwidths and ease of use, making it suitable for various high-demand applications such as wireless receivers, instrumentation, and test equipment. The ADC operates at a conversion rate of 250 MSPS and requires 1.8 V and 3.3 V power supplies for full performance operation. It features an integrated input buffer, external reference support, and a clock duty cycle stabilizer, among other advanced functionalities.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Analog Input Full Scale | 2.5 | 2/2.5 | 2.5 | V p-p |
| Signal-to-Noise Ratio (SNR) at 5 MHz | 74.6/76.4 | 74.7/76.4 | - | dBFS |
| Signal-to-Noise Ratio (SNR) at 97 MHz | 74.5/76.1 | - | - | dBFS |
| Clock Rate | 50 | - | 250 | MSPS |
| Clock Pulse Width High (tCH) | 2.5 | - | 2.5 | ns |
| Clock Pulse Width Low (tCL) | 2.5 | - | 2.5 | ns |
| Propagation Delay (tPD) | 3 | - | - | ns |
| Rise Time (tR) (20% to 80%) | 200 | - | - | ps |
| Fall Time (tF) (20% to 80%) | 200 | - | - | ps |
| Supply Voltage (AVDD1, AVDD2, AVDD3, DRVDD) | 1.8 V, 3.3 V | - | - | V |
Key Features
- Integrated input buffer and external reference support option
- Clock duty cycle stabilizer and output clock available
- Serial port control and built-in selectable digital test pattern generation
- Selectable output data format and LVDS outputs (ANSI-644 compatible)
- Excellent linearity at 250 MSPS with DNL = ±0.5 LSB typical and INL = ±3.5 LSB typical
- Low jitter of 60 fs rms
- Internal power-down feature via SPI, consuming less than 5 mW when disabled
- Available in a Pb-free, 72-lead LFCSP package with an exposed pad
Applications
- Multicarrier, multimode cellular receivers
- Antenna array positioning
- Power amplifier linearization
- Broadband wireless
- Radar
- Infrared imaging
- Communications instrumentation
Q & A
- What is the conversion rate of the AD9467BCPZ-250?
The AD9467BCPZ-250 operates at a conversion rate of 250 MSPS.
- What are the required power supplies for the AD9467BCPZ-250?
The device requires 1.8 V and 3.3 V power supplies for full performance operation.
- Does the AD9467BCPZ-250 require external reference or driver components?
No external reference or driver components are required for many applications.
- What is the signal-to-noise ratio (SNR) of the AD9467BCPZ-250 at 5 MHz?
The SNR at 5 MHz is 74.6/76.4 dBFS.
- What is the clock pulse width high (tCH) and low (tCL) for the AD9467BCPZ-250?
The clock pulse width high (tCH) and low (tCL) are both 2.5 ns.
- What are the typical DNL and INL values for the AD9467BCPZ-250?
The typical DNL is ±0.5 LSB, and the typical INL is ±3.5 LSB.
- What is the jitter performance of the AD9467BCPZ-250?
The device has a low jitter of 60 fs rms.
- What is the power consumption when the AD9467BCPZ-250 is in power-down mode?
The internal power-down feature via SPI consumes less than 5 mW when disabled.
- In what package is the AD9467BCPZ-250 available?
The device is available in a Pb-free, 72-lead LFCSP package with an exposed pad.
- What are some of the key applications for the AD9467BCPZ-250?
Key applications include multicarrier, multimode cellular receivers, antenna array positioning, power amplifier linearization, broadband wireless, radar, infrared imaging, and communications instrumentation.
