Overview
The AD9269BCPZRL7-65, produced by Analog Devices Inc., is a high-performance, dual-channel, 16-bit analog-to-digital converter (ADC) designed for a wide range of applications requiring high accuracy and speed. This ADC operates from a single 1.8 V analog supply and features a separate digital output driver supply that can accommodate 1.8 V to 3.3 V logic families. The device uses a multistage differential pipeline architecture with output error correction logic, ensuring 16-bit accuracy at sampling rates up to 80 MSPS and guaranteeing no missing codes over the full operating temperature range of −40°C to +85°C.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Resolution | 16-bit | |
| Sampling Rate | 20/40/65/80 MSPS | |
| Analog Supply Voltage | 1.8 V | V |
| Digital Output Supply Voltage | 1.8 V to 3.3 V | V |
| SNR at 9.7 MHz input | 77.6 dBFS | dBFS |
| SNR at 200 MHz input | 71 dBFS | dBFS |
| SFDR at 9.7 MHz input | 93 dBc | dBc |
| SFDR at 200 MHz input | 80 dBc | dBc |
| Power Consumption at 20 MSPS | 44 mW per channel | mW |
| Power Consumption at 80 MSPS | 100 mW per channel | mW |
| Analog Input Bandwidth | 700 MHz | MHz |
| Package Type | 64-Lead LFCSP | |
| Operating Temperature Range | −40°C to +85°C | °C |
Key Features
- Integrated quadrature error correction (QEC) for dc offset, gain, and phase mismatch correction between the two channels.
- High performance sample-and-hold circuit with on-chip voltage reference.
- Differential input with 700 MHz bandwidth and 2V p-p differential analog input.
- Low power consumption: 44 mW per channel at 20 MSPS and 100 mW per channel at 80 MSPS.
- Serial port control options with programmable clock and data alignment, digital test pattern generation, and power-down modes.
- Optional clock duty cycle stabilizer (DCS) to compensate for wide variations in the clock duty cycle.
- Data output in offset binary, gray code, or twos complement format.
- Support for both 1.8 V and 3.3 V CMOS levels with multiplexed output data option.
Applications
- Communications: diversity radio systems, multimode digital receivers (GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA).
- I/Q demodulation systems and smart antenna systems.
- Battery-powered instruments and handheld scope meters.
- Portable medical imaging and ultrasound.
- Radar/LIDAR systems.
Q & A
- What is the resolution and sampling rate of the AD9269BCPZRL7-65?
The AD9269BCPZRL7-65 is a 16-bit ADC with sampling rates of 20, 40, 65, and 80 MSPS.
- What is the analog supply voltage for the AD9269BCPZRL7-65?
The analog supply voltage is 1.8 V.
- What are the supported digital output supply voltages?
The device supports digital output supply voltages from 1.8 V to 3.3 V.
- What is the SNR and SFDR performance of the AD9269BCPZRL7-65?
The SNR is 77.6 dBFS at 9.7 MHz input and 71 dBFS at 200 MHz input. The SFDR is 93 dBc at 9.7 MHz input and 80 dBc at 200 MHz input.
- What is the power consumption of the AD9269BCPZRL7-65?
The power consumption is 44 mW per channel at 20 MSPS and 100 mW per channel at 80 MSPS.
- What is the bandwidth of the analog input?
The analog input bandwidth is 700 MHz.
- What package type is the AD9269BCPZRL7-65 available in?
The device is available in a 64-Lead LFCSP package.
- What is the operating temperature range of the AD9269BCPZRL7-65?
The operating temperature range is −40°C to +85°C.
- Does the AD9269BCPZRL7-65 support quadrature error correction?
Yes, it supports integrated quadrature error correction (QEC) for dc offset, gain, and phase mismatch correction.
- What data output formats are supported by the AD9269BCPZRL7-65?
The device supports offset binary, gray code, and twos complement data formats.
